Profiles

Steve Furber

Professor Emeritus, Department of Computer Science, The University of Manchester, UK

Verified email at manchester.ac.uk

Cited by 18660

Neural Networks Networks-on-Chip Microprocessors

Umit Yusuf Ogras

Gene Amdahl Professor, University of Wisconsin-Madison

Verified email at wisc.edu

Cited by 8495

System-on-chip Flexible Hybrid Electronics Mobile Multicore Platforms Networks-on-chip

Fernando Gehm Moraes

Professor at the School of Technology at PUCRS

Verified email at pucrs.br

Cited by 6585

Networks on Chip Embedded Systems Multicore Architectures Hardware Accelerators for ML Security

Steven Nowick

Professor Emeritus of Computer Science, Columbia University

Verified email at cs.columbia.edu

Cited by 6557

digital systems asynchronous circuits networks on chip computer-aided design low-power design

Sumeet S. Kumar

Innatera Nanosystems BV

Verified email at innatera.com

Cited by 6431

chip multiprocessors networks-on-chip neuromorphic computing memory architectures 3D design

Jens Sparsø

Professor, Technical University of Denmark

Verified email at dtu.dk

Cited by 5815

Digital systems Asynchronous circuits Low-power design Networks-on-Chip Many-core architecture

Chen Sun

Ayar Labs, Inc.

Verified email at ayarlabs.com

Cited by 5811

VLSI Photonics Circuits DRAM Networks-on-Chip

Maurizio Palesi

Associate Professor, University of Catania, Italy

Verified email at dieei.unict.it

Cited by 5405

Embedded systems NoC Networks on Chip

Ney Laert Vilar Calazans

Lecturer at the Computing Department (DEC), Federal University of Santa Catarina, UFSC

Verified email at ufsc.br

Cited by 4945

Digital Circuits Reconfigurable Hardware Asynchronous Circuits Networks on Chip Microelectronics

Paul V. Gratz

Department of Electrical and Computer Engineering, Texas A&M University

Verified email at tamu.edu

Cited by 4276

Computer Architecture Memory Systems Networks on Chip

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